1.
Hakkee Jung. Analysis of Drain-Induced Barrier Lowering for Gate-All-Around FET with Ferroelectric. Int. j. eng. technol. innov. [Internet]. 2024 Mar. 27 [cited 2024 May 26];14(2):189-200. Available from: https://ojs.imeti.org/index.php/IJETI/article/view/12887